| BODY HEIGHT | 0.120 INCHES MINIMUM AND 0.195 INCHES MAXIMUM |
| BODY LENGTH | 0.750 INCHES MINIMUM AND 0.795 INCHES MAXIMUM |
| BODY WIDTH | 0.245 INCHES MINIMUM AND 0.300 INCHES MAXIMUM |
| CASE OUTLINE SOURCE AND DESIGNATOR | -0-001-AG JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| DESIGN FUNCTION AND QUANTITY | 4 LATCH, NAND, R/S |
| FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND LOW POWER AND SCHOTTKY |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| INCLOSURE MATERIAL | CERAMIC AND GLASS |
| INPUT CIRCUIT PATTERN | 10 INPUT |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| MAXIMUM POWER DISSIPATION RATING | 19.0 MILLIWATTS |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -1.4 VOLTS MINIMUM POWER SOURCE AND 5.5 VOLTS MAXIMUM POWER SOURCE |
| STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS |
| TERMINAL TYPE AND QUANTITY | 16 PRINTED CIRCUIT |
| TERMINAL SURFACE TREATMENT | SOLDER |
| TEST DATA DOCUMENT | 96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.). |
| TIME RATING PER CHACTERISTIC | 22.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 27.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |