| BODY HEIGHT | 0.055 INCHES MINIMUM AND 0.140 INCHES MAXIMUM |
| BODY LENGTH | 0.745 INCHES MINIMUM AND 0.785 INCHES MAXIMUM |
| BODY WIDTH | 0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
| CASE OUTLINE SOURCE AND DESIGNATOR | -0-001-AE JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| DESIGN FUNCTION AND QUANTITY | 1 PHASE LOCKED LOOP |
| FEATURES PROVIDED | MONOLITHIC AND HERMETICALLY SEALED AND POSITIVE OUTPUTS AND LOW POWER AND 2-PHASE AND DC COUPLED AND W/ENABLE AND AC COUPLED AND EDGE TRIGGERED AND 3-STATE OUTPUT |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| INCLOSURE MATERIAL | CERAMIC AND GLASS |
| INPUT CIRCUIT PATTERN | 5 INPUT |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS |
| OUTPUT LOGIC FORM | COMPLEMENTARY-METAL OXIDE-SEMICONDUCTOR LOGIC |
| MAXIMUM POWER DISSIPATION RATING | 200.0 MILLIWATTS |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -0.5 VOLTS MINIMUM POWER SOURCE AND 15.5 VOLTS MAXIMUM POWER SOURCE |
| STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS |
| TERMINAL TYPE AND QUANTITY | 16 PRINTED CIRCUIT |
| TERMINAL SURFACE TREATMENT | SOLDER |
| TIME RATING PER CHACTERISTIC | 150.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 150.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |