| BODY HEIGHT | 0.030 INCHES MINIMUM AND 0.070 INCHES MAXIMUM |
| BODY LENGTH | 0.240 INCHES MINIMUM AND 0.275 INCHES MAXIMUM |
| BODY WIDTH | 0.160 INCHES MINIMUM AND 0.180 INCHES MAXIMUM |
| CASE OUTLINE SOURCE AND DESIGNATOR | T0-85 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| DESIGN FUNCTION AND QUANTITY | 4 GATE, NAND |
| FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND MEDIUM POWER AND HIGH SPEED |
| INCLOSURE CONFIGURATION | FLAT PACK |
| INCLOSURE MATERIAL | CERAMIC AND GLASS |
| INPUT CIRCUIT PATTERN | QUAD 2 INPUT |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| MAXIMUM POWER DISSIPATION RATING | 156.0 MILLIWATTS |
| OPERATING TEMP RANGE | +0.0 TO 75.0 CELSIUS |
| PRECIOUS MATERIAL | GOLD |
| PRECIOUS MATERIAL AND LOCATION | TERMINALS GOLD |
| STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS |
| TERMINAL TYPE AND QUANTITY | 14 FLAT LEADS |
| TERMINAL SURFACE TREATMENT | GOLD |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -1.5 VOLTS MINIMUM POWER SOURCE AND 5.5 VOLTS MAXIMUM POWER SOURCE |