| BODY HEIGHT | 0.031 INCHES MINIMUM AND 0.063 INCHES MAXIMUM |
| BODY LENGTH | 0.330 INCHES MINIMUM AND 0.350 INCHES MAXIMUM |
| BODY WIDTH | 0.165 INCHES MINIMUM AND 0.265 INCHES MAXIMUM |
| DESIGN FUNCTION AND QUANTITY | 2 GATE, NAND-NOR |
| FEATURES PROVIDED | MONOLITHIC AND HERMETICALLY SEALED AND POSITIVE OUTPUTS AND MEDIUM SPEED |
| INCLOSURE CONFIGURATION | FLAT PACK |
| INCLOSURE MATERIAL | CERAMIC AND GLASS |
| INPUT CIRCUIT PATTERN | DUAL 4 INPUT |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| MAXIMUM POWER DISSIPATION RATING | 240.0 MILLIWATTS |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -1.5 VOLTS MAXIMUM POWER SOURCE AND 5.5 VOLTS MAXIMUM POWER SOURCE |
| STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS |
| TERMINAL TYPE AND QUANTITY | 14 FLAT LEADS |
| TERMINAL SURFACE TREATMENT | SOLDER |
| TEST DATA DOCUMENT | 06481-970000 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| TIME RATING PER CHACTERISTIC | 40.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 40.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |